1. Field of the Invention
The present invention relates to a semiconductor device, and more particularly to a semiconductor device having bonding pads on two sides of a semiconductor chip.
2. Description of the Background Art
In a semiconductor device of a conventional BGA (Ball Grid Array) type, a semiconductor element (semiconductor chip) is fixed and adhered to a substrate made of glass epoxy resin, for example, with its active surface facing up. A connection pad (bonding pad) on the semiconductor element is connected to a bonding finger on the substrate by a wire made of gold, for example. The bonding finger is connected to a ball land by a copper interconnection. The ball land is provided for attachment of a solder ball provided for external connection. Such a BGA-type semiconductor device is disclosed, for example, in Japanese Patent Laying-Open Nos. 2000-68404 and 11-312705.
In the semiconductor element such as a memory, the connection pads are usually arranged along two sides of the semiconductor element, and the bonding fingers are generally arranged outside the side along which the connection pads are arranged. The wire for wire bonding is drawn out from the connection pad in a direction toward the outside of the side along which the connection pads are arranged.
An electric signal from the semiconductor element is taken out through a route from the connection pad through the bonding (wire), a copper interconnection on the substrate (including the bonding finger and an interconnection in a via) and the ball land to the solder ball. Such a routing is two-dimensional except for routing in the via, and intersection of interconnections is not allowed on the identical surface of the substrate. Accordingly, as the order or arrangement of the connection pads of the semiconductor element and pin arrangement of the solder ball are restricted, the order or the arrangement of the connection pads should be considered in advance at the time of designing the semiconductor element. In addition, when a product such as an existing semiconductor element of which design has already been completed and which can no longer accept consideration is employed, interconnections intersect two-dimensionally, resulting in failure in routing (failure in substrate design).
In general, a pitch between connection pads on the semiconductor element is smaller than that between pads of the bonding fingers. Therefore, in the conventional semiconductor device and structure, a package size necessarily tends to be restricted by a minimal dimension of the bonding finger.
Though the number of layers of the substrate may be increased in order to enable routing, this will cause cost increase as well as larger thickness of the substrate itself. Accordingly, the total height of the semiconductor device is increased, which will cause incompatibility with conventional products.